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Titre : [HOWTO] The Definitive BIOS Optimization Guide, rev 8.9
Lancé le 08-10-2006 09:31 par guegouli
Téléchargé de https://www.forum.oxmo.org/showthread.php?threadid=43377
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[Post 1]
Auteur : guegouli
Date : 08-10-2006 09:31
Titre : [HOWTO] The Definitive BIOS Optimization Guide, rev 8.9

Hop, juste un ptit lien avec plein de mots bushiens pour optimiser, voir comprendre son bios!
[QUOTE]Welcome To The Definitive BIOS Optimization Guide Revision 8.9

   
BIOS Optmization Guide
 
BIOS Option Name Published Date  
  
System Bus 
16-Bit Recovery Time 11 Aug 2003 
8-bit I/O Recovery Time 21 Aug 2003 
AT Bus Clock 10 Sep 2003 
Auto Detect DIMM/PCI Clk 21 Aug 2003 
Auto Turn Off PCI Clock Pin 22 Nov 2005 
Burn-In Mode 14 Aug 2005 
Byte Merge 20 Aug 2003 
CPU Spread Spectrum 31 Jul 2005 
CPU to PCI Post Write 20 Aug 2003 
CPU to PCI Write Buffer 20 Aug 2003 
Delayed Transaction 01 Sep 2003 
Differential Current 07 Jun 2004 
Disable Unused PCI Clock 22 Nov 2005 
FSB Spread Spectrum 18 Sep 2003 
Host Burn-in Mode 14 Aug 2005 
ISA 14.318MHz Clock 10 Sep 2003 
ISA Enable Bit 10 Sep 2003 
Master Priority Rotation 13 Sep 2003 
MCLK Spread Spectrum 03 Oct 2006 
P2C C2P Concurrency 18 Sep 2003 
Passive Release 19 Sep 2003 
PCI 2.1 Compliance 19 Sep 2003 
PCI Burn-in Mode 26 Aug 2005 
PCI Bus Parking 07 Oct 2005 
PCI Chaining 23 Sep 2003 
PCI Clock / CPU FSB Clock 23 Sep 2003 
PCI Clock Synchronization Mode 25 Sep 2005 
PCI Delay Transaction 04 Sep 2003 
PCI Dynamic Bursting 04 Sep 2003 
PCI Express Burn-in Mode 26 Aug 2005 
PCI IRQ Activated By 23 Sep 2003 
PCI Latency Timer 23 Sep 2003 
PCI Master 0 WS Read 23 Sep 2003 
PCI Master 0 WS Write 23 Sep 2003 
PCI Master Bus Timeout 15 Oct 2005 
PCI Master Bus Timeout Control 15 Oct 2005 
PCI Master Read Caching 23 Sep 2003 
PCI Pipelining 23 Sep 2003 
PCI Prefetch 04 Sep 2003 
PCI Target Latency 23 Sep 2003 
PCI Timeout 09 Aug 2005 
PCI to DRAM Prefetch 19 Sep 2003 
PCI#2 Access #1 Retry 19 Sep 2003 
PSB Parking 07 Oct 2005 
SM I/O Buffers Control 27 Jul 2005 
Split Lock Operations 09 Nov 2003 
Synchronous Mode Select 10 Nov 2003 
V-Link 8X Support 17 Nov 2005 
V-Link Data Rate 17 Nov 2005 
V-Link Mode Selection 17 Nov 2005 
  
Storage Subsystem 
32-bit Disk Access 16 Aug 2003 
32-bit Transfer Mode 16 Aug 2003 
ATA100RAID IDE Controller 21 Aug 2003 
Floppy Disk Access Control 18 May 2004 
Hard Disk Pre-Delay 09 Aug 2005 
HDD Self Diagnostic 07 Aug 2005 
HDD SMART Capability 10 Sep 2003 
IDE Bus Master Support 10 Sep 2003 
IDE DMA Transfer Access 27 Jul 2005 
IDE HDD Block Mode 10 Sep 2003 
IDE Prefetch Mode 19 Sep 2005 
Intel RAID Technology 29 Nov 2005 
Keyboard Auto-Repeat Delay 18 May 2004 
Keyboard Auto-Repeat Rate 18 May 2004 
Master Drive PIO Mode 13 Sep 2003 
Master Drive UltraDMA 13 Sep 2003 
Multi-Sector Transfers 21 Aug 2004 
Onboard FDC Swap A & B 18 May 2004 
Onboard FDD Controller 13 Sep 2003 
Onboard IDE-1 Controller 18 Sep 2003 
Onboard IDE-2 Controller 18 Sep 2003 
OnChip IDE Channel 0 03 Oct 2005 
OnChip IDE Channel 1 03 Oct 2005 
PCI IDE Busmaster 19 Sep 2003 
PIO Mode 23 May 2004 
SATA AHCI Mode 22 Nov 2005 
SATA Mode 17 Nov 2005 
SATA Spread Spectrum 19 Sep 2005 
Slave Drive PIO Mode 06 May 2004 
Slave Drive UltraDMA 06 May 2004 
Swap Floppy Drive 10 Nov 2003 
Ultra DMA Mode 21 May 2004 
UltraDMA-100 IDE Controller 21 May 2004 
UltraDMA-133 IDE Controller 21 May 2004 
UltraDMA-66 IDE Controller 21 May 2004 
  
Memory Subsystem 
2T Command 29 Sep 2005 
Act Bank A to B CMD Delay 21 Aug 2003 
CPU-DRAM 21 Aug 2004 
DCLK Feedback Delay 07 Jul 2005 
Delay DRAM Read Latch 01 Sep 2003 
DRAM Act to PreChrg CMD 03 Apr 2004 
DRAM Burst Length 8QW 18 May 2004 
DRAM Bus Selection 07 Jul 2005 
DRAM Data Integrity Mode 01 Sep 2003 
DRAM Idle Timer 01 Sep 2003 
DRAM Interleave Time 02 Sep 2003 
DRAM page mode 21 Aug 2004 
DRAM PreChrg to Act CMD 03 Apr 2004 
DRAM Ratio 01 Sep 2003 
DRAM Ratio HW Strap 01 Sep 2003 
DRAM Read Latch Delay 01 Sep 2003 
DRAM Refresh Rate 10 Sep 2003 
Fast R-W Turn Around 07 Sep 2003 
Fast Write to Read Turnaround 21 Aug 2004 
Force 4-Way Interleave 07 Sep 2003 
Gate A20 Option 10 Sep 2003 
LD-Off Dram RD/WR Cycles 21 Aug 2004 
MD Driving Strength 13 Sep 2003 
Memory Hole At 15M-16M 13 Sep 2003 
OS Select For DRAM > 64MB 19 Jul 2005 
OS2 Onboard Memory > 64M 19 Jul 2005 
OverWrite Rx6C 11 Oct 2005 
OverWrite Rx6D 11 Oct 2005 
Rank Interleave 23 May 2004 
Read Around Write 08 Oct 2003 
Read Wait State 08 Oct 2003 
Refresh Interval 19 Sep 2003 
Refresh Mode Select 19 Sep 2003 
Rx6C OverWrite 11 Oct 2005 
Rx6D OverWrite 11 Oct 2005 
SDRAM 1T Command 06 Apr 2004 
SDRAM 1T Command Control 06 Apr 2004 
SDRAM Active to Precharge Delay 21 Aug 2004 
SDRAM Bank Interleave 24 Oct 2003 
SDRAM Bank-to-Bank Delay 14 Apr 2004 
SDRAM Burst Len 24 Oct 2003 
SDRAM Burst Length 24 Oct 2003 
SDRAM CAS Latency Time 03 Apr 2004 
SDRAM Command Leadoff Time 21 Aug 2004 
SDRAM Command Rate 06 Apr 2004 
SDRAM Cycle Length 03 Apr 2004 
SDRAM Cycle Time Tras/Trc 03 Apr 2004 
SDRAM ECC Setting 06 May 2004 
SDRAM Idle Limit 04 Sep 2003 
SDRAM Leadoff Command 21 Aug 2004 
SDRAM Page Closing Policy 21 Aug 2004 
SDRAM Page Hit Limit 21 Aug 2004 
SDRAM PH Limit 21 Aug 2004 
SDRAM Precharge Control 21 Aug 2004 
SDRAM RAS Precharge Delay 21 Aug 2004 
SDRAM RAS Precharge Time 06 Apr 2004 
SDRAM RAS Pulse Width 06 Apr 2004 
SDRAM RAS-to-CAS Delay 03 Apr 2004 
SDRAM Row Active Time 06 Apr 2004 
SDRAM Row Cycle Time 14 Apr 2004 
SDRAM Tras Timing Value 14 Apr 2004 
SDRAM Trc Timing Value 14 Apr 2004 
SDRAM Trcd Timing Value 06 May 2004 
SDRAM Trp Timing Value 06 May 2004 
SDRAM Trrd Timing Value 14 Apr 2004 
SDRAM Write Recovery Time 18 May 2004 
SDRAM Write-to-Read Command Delay 21 May 2004 
Shadowing Address Ranges 06 May 2004 
Share Memory Size 02 Jan 2006 
Super Bypass Mode 09 Nov 2003 
Super Bypass Wait State 09 Nov 2003 
SuperStability Mode 09 Nov 2003 
Write CAS Latency (Twcl) 07 Jul 2005 
Write Data In to Read Delay 21 May 2004 
Write Recovery Time 18 May 2004 
  
Graphics Subsystem 
AGP 2X Mode 21 Aug 2003 
AGP 3.0 Calibration Cycle 03 Oct 2005 
AGP 4X Drive Strength 21 Aug 2003 
AGP 4X Mode 21 Aug 2003 
AGP 8X Mode 21 Aug 2003 
AGP Always Compensate 21 Aug 2003 
AGP Aperture Size 21 Aug 2003 
AGP Capability 23 May 2004 
AGP Clock / CPU FSB Clock 21 Aug 2003 
AGP Comp. Driving 29 Nov 2005 
AGP Drive Strength 21 Aug 2003 
AGP Drive Strength N Ctrl 21 Aug 2003 
AGP Drive Strength P Ctrl 21 Aug 2003 
AGP Driving Control 21 Aug 2003 
AGP Driving Value 29 Nov 2005 
AGP Fast Write 23 Sep 2005 
AGP ISA Aliasing 21 Aug 2003 
AGP Master 1WS Read 21 Aug 2003 
AGP Master 1WS Write 21 Aug 2003 
AGP Performance Control 19 Jul 2005 
AGP Prefetch 21 Aug 2003 
AGP Read Synchronization 31 Jul 2005 
AGP Secondary Lat Timer 26 Sep 2003 
AGP Spread Spectrum 18 Sep 2003 
AGP to DRAM Prefetch 21 Aug 2003 
AGP/PCI Burn-in Mode 14 Aug 2005 
AGPCLK / CPUCLK 21 Aug 2003 
DBI Output For AGP Trans 01 Sep 2003 
Direct Frame Buffer 05 Jan 2006 
DVMT Memory Size 08 Jan 2006 
DVMT Mode 19 Dec 2005 
DVMT Mode Select 26 Dec 2005 
DVMT/FIXED Memory 26 Dec 2005 
FIXED Memory Size 08 Jan 2006 
Frame Buffer Size 02 Jan 2006 
Graphic Win Size 02 Sep 2003 
Graphic Window 21 Aug 2004 
Graphics Aperture Size 21 Aug 2004 
IGD DVMT Memory 26 Dec 2005 
Internal Graphics Mode Select 26 Dec 2005 
Manual AGP Comp. Driving 29 Nov 2005 
No Mask of SBA FE 13 Sep 2003 
On-Chip Frame Buffer Size 02 Jan 2006 
OnChip VGA Mode Select 02 Jan 2006 
PCI/VGA Palette Snoop 03 Oct 2003 
PCIE Spread Spectrum 16 Sep 2005 
PEG Force X1 13 Jan 2006 
PEG Link Mode 05 Sep 2005 
PEG Port 27 Jan 2006 
PEG Port VC1/Map 27 Jan 2006 
PEG/Onchip VGA Control 08 Jan 2006 
Post Write Combine 05 Oct 2003 
Primary Graphics Adapter 04 Sep 2003 
Primary VGA BIOS 19 Sep 2003 
Search for MDA Resources 19 Jul 2005 
USWC Write Posting 14 Oct 2003 
VGA Share Memory Size 02 Jan 2006 
Video BIOS Cacheable 22 Nov 2003 
Video BIOS Shadowing 22 Nov 2003 
Video Memory Cache Mode 17 Aug 2005 
Video RAM Cacheable 15 Dec 2003 
  
Miscellaneous 
Anti-Virus Protection 21 Aug 2003 
ASF Support 03 Oct 2006 
Duplex Select 02 Sep 2003 
Flash BIOS Protection 07 Sep 2003 
Floppy 3 Mode Support 07 Sep 2003 
Hardware Reset Protect 10 Sep 2003 
KBC Input Clock Select 13 Sep 2003 
MAC LAN 21 Jul 2005 
MAC Media Interface 07 Aug 2005 
MAC PHY IEEE Test 21 Jul 2005 
Onboard IR Function 18 Sep 2003 
Onboard Parallel Port 18 Sep 2003 
Onboard Serial Port 1 18 Sep 2003 
Onboard Serial Port 2 18 Sep 2003 
Onboard USB Controller 18 Sep 2003 
Parallel Port Mode 19 Sep 2003 
Power On Function 05 Oct 2003 
PS/2 Mouse Function Control 18 May 2004 
RxD, TxD Active 14 Oct 2003 
Security Setup 10 Nov 2003 
Spread Spectrum 19 Sep 2003 
Typematic Rate 06 May 2004 
Typematic Rate Delay 06 May 2004 
Typematic Rate Setting 06 May 2004 
USB Controller 10 Nov 2003 
USB Keyboard Support 21 Aug 2004 
USB Legacy Support 03 Oct 2006 
USB Mouse Support 21 May 2004 
USB Port 64/60 Emulation 03 Oct 2006 
Virus Warning 10 Nov 2003 
Watch Dog Timer Select 03 Oct 2006 
Watchdog Timer 21 Aug 2004 
  
System Resource Management 
APIC Function 22 Nov 2005 
Assign IRQ For USB 21 Aug 2003 
Assign IRQ For VGA 21 Aug 2003 
ECP Mode Use DMA 02 Sep 2003 
EPP Mode Select 07 Sep 2003 
FDD IRQ Can Be Free 29 Sep 2005 
Force Update ESCD 10 Sep 2003 
Interrupt Mode 23 Sep 2003 
IOAPIC Enable 22 Nov 2005 
MPS Control Version For OS 02 Sep 2003 
MPS Revision 13 Sep 2003 
PIRQ x Use IRQ No. 03 Oct 2003 
PNP OS Installed 05 Oct 2003 
Resource Controlled By 14 Oct 2003 
  
Bootstrap Management 
Boot Other Device 20 Aug 2003 
Boot Sequence 20 Aug 2003 
Boot Sequence EXT Means 20 Aug 2003 
Boot To OS2 19 Jul 2005 
Boot Up Floppy Seek 20 Aug 2003 
Boot Up NumLock Status 20 Aug 2003 
CPUID Maximum Value Limit 30 Aug 2005 
Delay IDE Initial 01 Sep 2003 
DOS Flat mode 21 Aug 2004 
Extended CPUID Function 05 Jan 2006 
First Boot Device 07 Sep 2003 
Full Screen Logo 23 May 2004 
Init Display First 02 Sep 2003 
Interrupt 19 Capture 23 Sep 2005 
Quick Boot 08 Oct 2003 
Quick Power On Self Test 08 Oct 2003 
Quiet Boot 13 Jan 2006 
Report No FDD For Win95 14 Oct 2003 
Reset Configuration Data 14 Oct 2003 
Second Boot Device 09 Nov 2003 
Silent Boot 26 Aug 2005 
Small Logo (EPA) Show 13 Jan 2006 
System BIOS Cacheable 06 May 2004 
Third Boot Device 10 Nov 2003 
USB Flash Disk Type 03 Oct 2006 
  
Processor 
Adjacent Cache Line Prefetch 05 Sep 2005 
Athlon 4 SSED Instruction 21 Aug 2003 
Clock Throttle 21 Aug 2004 
Compatible FPU OPCODE 20 Aug 2003 
CPU Adjacent Sector Prefetch 08 Sep 2005 
CPU Drive Strength 20 Aug 2003 
CPU Fast String 20 Aug 2003 
CPU Hyper-Threading 20 Aug 2003 
CPU L2 Cache ECC Checking 20 Aug 2003 
CPU Latency Timer 21 Aug 2004 
CPU Level 1 Cache 20 Aug 2003 
CPU Level 2 Cache 20 Aug 2003 
CPU Level 3 Cache 20 Aug 2003 
CPU Thermal-Throttling 21 Aug 2004 
CPU VCore Voltage  20 Aug 2003 
Delay Prior To Thermal 01 Sep 2003 
Errata 123 Enhancement 28 Oct 2005 
Errata 123 Option 28 Oct 2005 
Errata 94 Enhancement 26 Oct 2005 
Errata 94 Option 26 Oct 2005 
Execute Disable Bit 19 Oct 2005 
FPU OPCODE Compatible Mode 02 Sep 2003 
Host Bus In-Queue Depth 03 Oct 2003 
Hyper Threading Technology 02 Sep 2003 
In-Order Queue Depth 10 Sep 2003 
IOQD 03 Oct 2003 
K7 CLK CTL Select 10 Sep 2003 
L1 Data Cache Context Mode 16 Sep 2005 
L3 Cache 13 Sep 2003 
Level 2 Cache Latency 13 Sep 2003 
Limit CPUID Max. To 3 23 Oct 2005 
MP Capable Bit Identify 21 Aug 2004 
N/B Strap CPU As 13 Sep 2003 
No-Execute Memory Protect 19 Oct 2005 
NX BIOS Control 05 Jan 2006 
NX Technology 08 Sep 2005 
Processor Number Feature 05 Oct 2003 
S2K Bus Driving Strength 14 Oct 2003 
S2K Strobe N Control 14 Oct 2003 
S2K Strobe P Control 14 Oct 2003 
Speed Error Hold 09 Nov 2003 
SSE/SSE2 Instructions 19 Jul 2005 
SW Single Processor Mode 09 Aug 2005 
XD Technology 08 Sep 2005  
 
[/QUOTE] 

here:
[url]http://www.rojakpot.com/freebog.aspx[/url]

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[Post 2]
Auteur : soul^keeper
Date : 08-10-2006 09:58

Excellent ça !!

Merci pour ce lien ! §clap§

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[Post 3]
Auteur : guegouli
Date : 08-10-2006 10:11

surtout que les gars semblent bien connaitre le sujet et cassent pas mal de prejuges...
exemple, le fameux agp aperture size!

[quote]AGP Aperture Size

Common Options : 4, 8, 16, 32, 64, 128, 256

Quick Review

This BIOS feature does two things. It selects the size of the AGP aperture and it determines the size of the GART (Graphics Address Relocation Table).

The aperture is a portion of the PCI memory address range that is dedicated for use as AGP memory address space while the GART is a translation table that translates AGP memory addresses into actual memory addresses which are often fragmented. The GART allows the graphics card to see the memory region available to it as a contiguous piece of memory range.

Host cycles that hit the aperture range are forwarded to the AGP bus without need for translation. The aperture size also determines the maximum amount of system memory that can be allocated to the AGP graphics card for texture storage.

Please note that the AGP aperture is merely address space, not actual physical memory in use. Although it is very common to hear people recommending that the AGP aperture size should be half the size of system memory, that is wrong!

The requirement for AGP memory space shrinks as the graphics card's local memory increases in size. This is because the graphics card will have more local memory to dedicate to texture storage. So, if you upgrade to a graphics card with more memory, you shouldn't be "deceived" into thinking that you will need even more AGP memory! On the contrary, a smaller AGP memory space will be required.

It is recommended that you keep the AGP aperture around 64MB to 128MB in size, even if your graphics card has a lot of onboard memory. This allows flexibility in the event that you actually need extra memory for texture storage. It will also keep the GART (Graphics Address Relocation Table) within a reasonable size.

[/quote]

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